Dma Transfer Count Register (Dtcr) - Renesas H8SX/1500 Series Hardware Manual

32-bit cisc microcomputer
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Section 7 DMA Controller (DMAC)
7.2.4

DMA Transfer Count Register (DTCR)

DTCR is a 32-bit readable/writable register that specifies the size of data to be transferred (total
transfer size).
To transfer 1-byte data in total, set H'00000001 in DTCR. When H'00000000 is set in this register,
it means that the total transfer size is not specified and data is transferred with the transfer counter
stopped (free running mode). When H'FFFFFFFF is set, the total transfer size is 4 Gbytes
(4,294,967,295), which is the maximum size. While data is being transferred, this register
indicates the remaining transfer size. The value corresponding to its data access size is subtracted
every time data is transferred (byte: −1, word: −2, and longword: −4).
Although DTCR can always be read from by the CPU, it must be read from in longwords and
must not be written to while data for the channel is being transferred.
Bit
31
Bit Name
Initial Value
0
R/W
R/W
Bit
23
Bit Name
Initial Value
0
R/W
R/W
Bit
15
Bit Name
Initial Value
0
R/W
R/W
Bit
7
Bit Name
Initial Value
0
R/W
R/W
Rev. 3.00 Mar. 14, 2006 Page 140 of 804
REJ09B0104-0300
30
29
28
0
0
R/W
R/W
R/W
22
21
20
0
0
R/W
R/W
R/W
14
13
12
0
0
R/W
R/W
R/W
6
5
0
0
R/W
R/W
R/W
27
26
0
0
0
R/W
R/W
19
18
0
0
0
R/W
R/W
11
10
0
0
0
R/W
R/W
4
3
2
0
0
0
R/W
R/W
25
24
0
0
R/W
R/W
17
16
0
0
R/W
R/W
9
8
0
0
R/W
R/W
1
0
0
0
R/W
R/W

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