Table 9.27 Tiorh_3 - Renesas H8SX/1500 Series Hardware Manual

Section 9 16-Bit Timer Pulse Unit (TPU)

Table 9.27 TIORH_3

Bit 3 Bit 2 Bit 1
IOA3 IOA2 IOA1
0 0 0
0 0 0
0 0 1
0 0 1
0 1 0
0 1 0
0 1 1
0 1 1
1 0 0
1 0 0
1 0 1
1 1 X
[Legend]
X: Don't care
Note: * When bits TPSC2 to TPSC0 in TCR_4 are set to B'000 and Pφ/1 is used as the
TCNT_4 counter clock, this setting is ignored and an input capture interrupt is not
generated.
Rev. 3.00 Mar. 14, 2006 Page 286 of 804
REJ09B0104-0300
Bit 0 TGRA_3
IOA0 Function
0 Output
compare
1
register
0
1
0
1
0
1
0 Input
capture
register
1
X
X
Description
TIOCA3 Pin Function
Output disabled
Initial output is 0 output
0 output at compare match
Initial output is 0 output
1 output at compare match
Initial output is 0 output
Toggle output at compare match
Output disabled
Initial output is 1 output
0 output at compare match
Initial output is 1 output
1 output at compare match
Initial output is 1 output
Toggle output at compare match
Capture input source is TIOCA3 pin
Input capture at rising edge
Capture input source is TIOCA3 pin
Input capture at falling edge
Capture input source is TIOCA3 pin
Input capture at both edges
Capture input source is channel 4/count clock
Input capture* at TCNT_4 count-up/count-down