Section 2 CPU
2.7
Instruction Set
The H8SX CPU has 87 types of instructions. The instructions are classified by function as shown
in table 2.1. The arithmetic operation, logic operation, shift, and bit manipulation instructions are
called operation instruction in this manual.
Table 2.1
Instruction Classification
Function
Instructions
Data transfer
MOV
MOVFPE*
POP, PUSH*
LDM, STM
MOVA
Block transfer
EEPMOV
MOVMD
MOVSD
Arithmetic
ADD, ADDX, SUB, SUBX, CMP, NEG, INC, DEC
operations
DAA, DAS
ADDS, SUBS
MULXU, DIVXU, MULXS, DIVXS
MULU, DIVU, MULS, DIVS
MULU/U, MULS/U
EXTU, EXTS
TAS
MAC
LDMAC, STMAC
CLRMAC
Logic operations
AND, OR, XOR, NOT
Shift
SHLL, SHLR, SHAL, SHAR, ROTL, ROTR, ROTXL, ROTXR B/W/L
Bit manipulation
BSET, BCLR, BNOT, BTST, BAND, BIAND, BOR, BIOR,
BXOR, BIXOR, BLD, BILD, BST, BIST
BSET/EQ, BSET/NE, BCLR/EQ, BCLR/NE, BSTZ, BISTZ
BFLD, BFST
Rev. 3.00 Mar. 14, 2006 Page 36 of 804
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6
6
, MOVTPE*
1
Size
Types
B/W/L
6
B
W/L
L
2
B/W*
B
3
B/W/L
B
B/W/L
27
B
L
B/W
W/L
L
W/L
B
B/W/L
4
8
B
20
B
B