Renesas H8SX/1500 Series Hardware Manual page 33

Section 1 Overview
Table 1.1 Pin Configuration in Each Operating Mode.............................................................. 6
Table 1.2 Pin Functions .......................................................................................................... 10
Section 2 CPU
Table 2.1 Instruction Classification ........................................................................................ 36
Table 2.2 Combinations of Instructions and Addressing Modes (1)....................................... 38
Table 2.2 Combinations of Instructions and Addressing Modes (2)....................................... 41
Table 2.3 Operation Notation ................................................................................................. 42
Table 2.4 Data Transfer Instructions....................................................................................... 43
Table 2.5 Block Transfer Instructions..................................................................................... 44
Table 2.6 Arithmetic Operation Instructions .......................................................................... 45
Table 2.7 Logic Operation Instructions .................................................................................. 47
Table 2.8 Shift Operation Instructions.................................................................................... 48
Table 2.9 Bit Manipulation Instructions ................................................................................. 49
Table 2.10 Branch Instructions ................................................................................................. 51
Table 2.11 System Control Instructions.................................................................................... 52
Table 2.12 Addressing Modes .................................................................................................. 54
Table 2.13 Absolute Address Access Ranges ........................................................................... 58
Table 2.14 Effective Address Calculation for Transfer and Operation Instructions ................. 62
Table 2.15 Effective Address Calculation for Branch Instructions........................................... 63
Section 3 MCU Operating Modes
Table 3.1 MCU Operating Mode Settings .............................................................................. 67
Table 3.2 Settings of Bits MSD3 to MSD0 ............................................................................ 69
Section 4 Exception Handling
Table 4.1 Exception Types and Priority.................................................................................. 73
Table 4.2 Exception Handling Vector Table........................................................................... 74
Table 4.3 Calculation Method of Exception Handling Vector Table Address........................ 76
Table 4.4 Status of CCR and EXR after Trace Exception Handling....................................... 78
Table 4.5 Bus Cycle and Address Error.................................................................................. 79
Table 4.6 States of CCR and EXR after Address Error Exception Handling ......................... 81
Table 4.7 Interrupt Sources..................................................................................................... 81
Table 4.8 Status of CCR and EXR after Trap Instruction Exception Handling...................... 83
Table 4.9 Status of CCR and EXR after Illegal Instruction Exception Handling ................... 84
Section 5 Interrupt Controller
Table 5.1 Pin Configuration.................................................................................................... 88
Tables
Rev. 3.00 Mar. 14, 2006 Page xxxiii of xxxviii