Appendix C:
The Flash Memory in the MB90F583
C.1 Outline
There is a 1M-bit Flash memory (128K word x 8/64K word x 16) located at the FE~FF bank of the CPU
memory map in MB90F583. With the flash memory interface circuit, it is possible for read access from and
program access to the CPU. Programming or erasing the flash memory are done by the CPU operation
instruction through the flash memory interface circuit. Therefore, with proper CPU control software, it is
possible re-programming the flash memory of on-board MB90F583. That means changing of the data in
the flash memory of on-board MB90F583 can be done.
•
Features
128K word x 8/64K word x 16 bit (16K+8K+8K+32K+64K sector architecture)
Compatible with JEDEC standard command
Automatic Algorithm (Embedded
- Automatic Program Algorithm
- Automatic Erase Algorithm
Sector Erase Suspend/Sector Erase Resume function available
Program/Erase cycle completion can be detected by data polling, toggle bit and CPU interrupt
Sector erase function (any combination of sector)
Number of programming/erasing: 10,000 times (minimum)
Note: Embedded
•
Program/Erase operation
The flash memory of MB90F583 cannot be programmed and read in the same time. When
programming or erasing the flash memory, the programming data will be copied to the RAM first; and
then executing programming or erasing the flash memory in the RAM. This keeps programming and
erasing the flash memory as simple as a writing operation.
•
Register
Flash Control Register (FMCS)
Address: 0000AE
Read/write
Initial value
TM
Algorithm: same as MBM29F400TA)
TM
Algorithm is trademarks of Advanced Mirco device, Inc.
7
6
INTE
RDYINT
H
(R/W)
(R/W)
(R/W)
(0)
(0)
5
4
3
WE
RDY
Reserved
(W)
(W)
(X)
(0)
(0)
2
1
0
LPM1
Reserved
LPM0
(R/W)
(W)
(R/W)
(0)
(0)
(0)
Bit Number
FMCS