Motorola MPC823e Reference Manual page 1311

Microprocessor for mobile computing
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tlbia
Assembler Syntax
BIT
0
1
2
FIELD
31
BIT
16
17
18
FIELD
00000
Definition
Operation
Description
MOTOROLA
tlbia
3
4
5
6
7
00000
19
20
21
22
23
Translation Lookaside Buffer Invalidate All
All TLB entries ← invalid
The entire translation lookaside buffer (TLB) is invalidated (that
is, all entries are removed). The TLB is invalidated regardless of
the settings of MSR[IR] and MSR[DR]. The invalidation is done
without reference to the SLB, segment table, or segment
registers. This instruction does not cause the entries to be
invalidated in other processors. This is a supervisor-level
instructon.
Other registers altered:
None
POWERPC ARCHITECTURE
LEVEL
OEA
MPC823e REFERENCE MANUAL
MPC823e Instruction Set—tlbia
8
9
10
11
12
00000
24
25
26
27
28
370
SUPERVISOR
OPTIONAL
LEVEL
13
14
15
29
30
31
0
FORM
X
B-153

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