Motorola MPC823e Reference Manual page 1287

Microprocessor for mobile computing
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stbux
Assembler Syntax
BIT
0
1
2
FIELD
31
BIT
16
17
18
FIELD
B
Definition
Operation
Description
MOTOROLA
stbux
rS,rA,rB
3
4
5
6
7
19
20
21
22
23
Store Byte with Update Indexed
EA ← (rA) + (rB)
MEM(EA, 1) ← rS[24-31]
rA ← EA
EA is the sum (rA) + (rB). The contents of the low-order eight bits
of rS are stored into the byte in memory addressed by EA. EA is
placed into rA. If rA = 0, the instruction form is invalid.
Other registers altered:
None
POWERPC ARCHITECTURE
LEVEL
UISA
MPC823e REFERENCE MANUAL
MPC823e Instruction Set—stbux
8
9
10
11
12
S
24
25
26
27
28
247
SUPERVISOR
OPTIONAL
LEVEL
13
14
15
A
29
30
31
0
FORM
X
B-129

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