Motorola MPC823e Reference Manual page 1255

MOTOROLA
1
SPR
DECIMAL SPR[5–9]
794 11000
795 11000
796 11000
797 11000
798 11000
799 11000
816 11001
817 11001
818 11001
824 11001
825 11001
826 11001
NOTES:
1. The order of the two 5-bit halves of the SPR number is reversed
compared with actual instruction coding.
2. Sets the EE Bit in the MSR.
3. Clears the EE Bit in the MSR.
4. Development Support (Debug) Register.
For mtspr and mfspr instructions, the SPR number coded in
assembly language does not appear directly as a 10-bit binary
number in the instruction. The number coded is split into two 5-bit
halves that are reversed in the instruction, with the high-order five bits
appearing in bits 16–20 of the instruction and the low-order five bits
in bits 11–15.
POWERPC ARCHITECTURE
LEVEL
UISA/OEA
NOTE: mfspr is supervisor-level only if SPR[0] = 1.
MPC823e REFERENCE MANUAL
MPC823e Instruction Set—mfspr
REGISTER
NAME
SPR[0–4]
11010 MD_AP
11011 MD_EPN
11100 M_TWB
11101 MD_TWC
11110 MD_RPN
11111 M_TW
10000 MI_DBCAM
10001 MI_DBRAM0
10010 MI_DBRAM1
11000 MD_DBCAM
11001 MI_DBRAM0
11010 MI_DBRAM1
SUPERVISOR OPTIONAL
LEVEL
√
ACCESS
Supervisor
Supervisor
Supervisor
Supervisor
Supervisor
Supervisor
Supervisor
Supervisor
Supervisor
Supervisor
Supervisor
Supervisor
FORM
XFX
B-97