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sthu
Assembler Syntax
BIT
0
1
2
FIELD
45
BIT
16
17
18
FIELD
Definition
Operation
Description
MOTOROLA
sthu
rS,d(rA)
3
4
5
6
7
19
20
21
22
23
d
Store Half Word with Update
EA ← (rA) + EXTS(d)
MEM(EA, 2) ← rS[16-31]
rA ← EA
EA is the sum (rA) + d. The contents of the low-order 16 bits of
rS are stored into the half word in memory addressed by EA. EA
is placed into rA. If rA = 0, the instruction form is invalid.
Other registers altered:
None
POWERPC ARCHITECTURE
LEVEL
UISA
MPC823e REFERENCE MANUAL
MPC823e Instruction Set—sthu
8
9
10
11
12
S
24
25
26
27
28
SUPERVISOR
OPTIONAL
LEVEL
13
14
15
A
29
30
31
FORM
D
B-133
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