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MPC823e Instruction Set—orc
orc
Assembler Syntax
BIT
0
1
2
FIELD
31
BIT
16
17
18
FIELD
B
Definition
Operation
Description
B-112
orc
rA,rS,rB (Rc = 0)
orc.
rA,rS,rB (Rc = 1)
3
4
5
6
7
19
20
21
22
23
OR with Complement
rA ← (rS) | ¬ (rB)
The contents of rS are ORed with the complement of the
contents of rB and the result is placed into rA.
Other registers altered:
Condition Register (CR0 field):
Affected: LT, GT, EQ, SO (if Rc = 1)
POWERPC ARCHITECTURE
LEVEL
UISA
MPC823e REFERENCE MANUAL
8
9
10
11
12
S
24
25
26
27
28
412
SUPERVISOR
OPTIONAL
LEVEL
13
14
15
A
29
30
31
RC
FORM
X
MOTOROLA
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