Motorola MPC823e Reference Manual page 1239

Microprocessor for mobile computing
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lswx
Assembler Syntax
BIT
0
1
2
FIELD
31
BIT
16
17
18
FIELD
B
Definition
Operation
Description
MOTOROLA
lswx
rD,rA,rB
3
4
5
6
7
19
20
21
22
23
Load String Word Indexed
if rA = 0 then b ← 0
else b ← (rA)
EA ← b + (rB)
← XER[25–31]
n
r ← rD – 1
i ← 32
rD ← undefined
do while
> 0
n
if i = 32 then
r ← r + 1 (mod 32)
GPR(r) ← 0
GPR(r)[i–i + 7] ← MEM(EA, 1)
i ← i + 8
if i = 32 then i ← 0
EA ← EA + 1
– 1
n
n
EA is the sum (rA|0) + (rB). Let n = XER[25–31]; n is the number
of bytes to load. Let nr = CEIL( n ÷ 4); nr is the number of
registers to receive data. If n > 0, n consecutive bytes starting at
EA are loaded into GPRs rD through rD + nr – 1.
Bytes are loaded left to right in each register. The sequence of
registers wraps around through r0 if required. If the four bytes of
rD + nr – 1 are only partially filled, the unfilled low-order byte(s)
of that register are cleared. If n = 0, the contents of rD are
undefined.
If rA or rB is in the range of registers specified to be loaded,
including the case in which rA = 0, either the system illegal
instruction error handler is invoked or the results are boundedly
undefined. If rD = rA or rD = rB, the instruction form is invalid. If
rD and rA both specify GPR0, the form is invalid.
MPC823e REFERENCE MANUAL
MPC823e Instruction Set—lswx
8
9
10
11
12
D
24
25
26
27
28
533
13
14
15
A
29
30
31
0
B-81

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