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stwcx.
Assembler Syntax
BIT
0
1
2
FIELD
31
BIT
16
17
18
FIELD
B
Definition
Operation
Description
MOTOROLA
stwcx.
rS,rA,rB
3
4
5
6
7
19
20
21
22
23
Store Word Conditional Indexed
if rA = 0 then b ← 0
else b ← (rA)
EA ← b + (rB)
if RESERVE then
if RESERVE_ADDR = physical_addr(EA)
MEM(EA, 4) ← rS
CR0 ← 0b00 || 0b1 || XER[SO]
else
u ← undefined 1-bit value
if u then MEM(EA, 4) ← rS
CR0 ← 0b00 || u || XER[SO]
RESERVE ← 0
else
CR0 ← 0b00 || 0b0 || XER[SO]
EA is the sum (rA|0) + (rB). If the reserved bit is set, the stwcx.
instruction stores rS to effective address (rA + rB), clears the
reserved bit, and sets CR0[EQ]. If the reserved bit is not set, the
stwcx. instruction does not do a store; it leaves the reserved bit
cleared and clears CR0[EQ]. Software must look at CR0[EQ] to
see if the stwcx. was successful.
The reserved bit is set by the lwarx instruction. The reserved bit
is cleared by any stwcx. instruction to any address, and also by
snooping logic if it detects that another processor does any kind
of store to the block indicated in the reservation buffer when
reserved is set.
If a reservation exists, and the memory address specified by the
stwcx. instruction is the same as that specified by the load and
reserve instruction that established the reservation, the contents
of rS are stored into the word in memory addressed by EA and
the reservation is cleared.
MPC823e REFERENCE MANUAL
MPC823e Instruction Set—stwcx.
8
9
10
11
12
S
24
25
26
27
28
150
13
14
15
A
29
30
31
1
B-141
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