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MPC823e Instruction Set—lbzx
lbzx
Assembler Syntax
BIT
0
1
2
FIELD
31
BIT
16
17
18
FIELD
B
Definition
Operation
Description
B-68
lbzx
rD,rA,rB
3
4
5
6
7
19
20
21
22
23
Load Byte and Zero Indexed
if rA = 0 then b ← 0
else b ← (rA)
EA ← b + (rB)
rD ← (24)0 || MEM(EA, 1)
EA is the sum (rA|0) + (rB). The byte in memory addressed by
EA is loaded into the low-order eight bits of rD. The remaining
bits in rD are cleared.
Other registers altered:
None
POWERPC ARCHITECTURE
LEVEL
UISA
MPC823e REFERENCE MANUAL
8
9
10
11
12
D
24
25
26
27
28
87
SUPERVISOR
OPTIONAL
LEVEL
13
14
15
A
29
30
31
0
FORM
X
MOTOROLA
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