Bit Banding - ST STM32F410 Reference Manual

The Flash memory is organized as follows:
•
A main memory block divided into sectors.
•
System memory from which the device boots in System memory boot mode
•
512 OTP (one-time programmable) bytes for user data.
•
Option bytes to configure read and write protection, BOR level, watchdog
software/hardware and reset when the device is in Standby or Stop mode.
Refer to
2.5

Bit banding

The Cortex
each word in an alias region of memory to a bit in a bit-band region of memory. Writing to a
word in the alias region has the same effect as a read-modify-write operation on the
targeted bit in the bit-band region.
In the STM32F410 devices both the peripheral registers and the SRAM1 are mapped to a
bit-band region, so that single bit-band write and read operations are allowed. The
operations are only available for Cortex
masters (e.g. DMA).
A mapping formula shows how to reference each word in the alias region to a corresponding
bit in the bit-band region. The mapping formula is:
bit_word_addr = bit_band_base + (byte_offset x 32) + (bit_number × 4)
where:
–
–
–
–
Example
The following example shows how to map bit 2 of the byte located at SRAM1 address
0x20000300 to the alias region:
0x22006008 = 0x22000000 + (0x300*32) + (2*4)
Writing to address 0x22006008 has the same effect as a read-modify-write operation on bit
2 of the byte at SRAM1 address 0x20000300.
Reading address 0x22006008 returns the value (0x01 or 0x00) of bit 2 of the byte at SRAM1
address 0x20000300 (0x01: bit set; 0x00: bit reset).
For more information on bit-banding, refer to the Cortex
manual (see
42/771
Section 3: Embedded Flash memory interface
®
-M4 with FPU memory map includes two bit-band regions. These regions map
bit_word_addr is the address of the word in the alias memory region that maps to
the targeted bit
bit_band_base is the starting address of the alias region
byte_offset is the number of the byte in the bit-band region that contains the
targeted bit
bit_number is the bit position (0-7) of the targeted bit
Related documents on page
®
-M4 with FPU accesses, and not from other bus
1).
RM0401 Rev 3
for more details.
®
-M4 with FPU programming
RM0401