Figure 221. Mute Mode Using Idle Line Detection - ST STM32F410 Reference Manual

Advanced arm-based 32-bit mcus
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RM0401
Universal synchronous receiver transmitter (USART) /universal asynchronous receiver
Idle line detection (WAKE=0)
The USART enters mute mode when the RWU bit is written to 1.
It wakes up when an Idle frame is detected. Then the RWU bit is cleared by hardware but
the IDLE bit is not set in the USART_SR register. RWU can also be written to 0 by software.
An example of mute mode behavior using Idle line detection is given in
Figure
221.

Figure 221. Mute mode using Idle line detection

Address mark detection (WAKE=1)
In this mode, bytes are recognized as addresses if their MSB is a '1 else they are
considered as data. In an address byte, the address of the targeted receiver is put on the 4
LSB. This 4-bit word is compared by the receiver with its own address that is programmed in
the ADD bits in the USART_CR2 register.
The USART enters mute mode when an address character is received that does not match
its programmed address. In this case, the RWU bit is set by hardware. The RXNE flag is not
set for this address byte and no interrupt nor DMA request is issued as the USART would
have entered mute mode.
It exits from mute mode when an address character is received that matches the
programmed address. Then the RWU bit is cleared and subsequent bytes are received
normally. The RXNE bit is set for the address character since the RWU bit has been
cleared.
The RWU bit can be written to as 0 or 1 when the receiver buffer contains no data (RXNE=0
in the USART_SR register). Otherwise the write attempt is ignored.
An example of mute mode behavior using address mark detection is given in
Figure
222.
RM0401 Rev 3
653/771
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