Table 25. Flexible Swj-Dp Pin Assignment - ST STM32F410 Reference Manual

RM0401
Full SWJ (JTAG-DP + SW-DP) - Reset state
Full SWJ (JTAG-DP + SW-DP) but without
NJTRST
JTAG-DP Disabled and SW-DP Enabled
JTAG-DP Disabled and SW-DP Disabled
•
GPIO
Configure the desired I/O as output or input in the GPIOx_MODER register.
•
Peripheral alternate function
For the ADC configure the desired I/O as analog in the GPIOx_MODER register.
For other peripherals:
–
–
–
• EVENTOUT
Configure the I/O pin used to output the Cortex
connecting it to AF15
Please refer to the "Alternate function mapping" table in the datasheets for the detailed
mapping of the system and peripherals' alternate function I/O pins.

Table 25. Flexible SWJ-DP pin assignment

Available debug ports
Configure the desired I/O as an alternate function in the GPIOx_MODER register
Select the type, pull-up/pull-down and output speed via the GPIOx_OTYPER,
GPIOx_PUPDR and GPIOx_OSPEEDER registers, respectively
Connect the I/O to the desired AFx in the GPIOx_AFRL or GPIOx_AFRH register
PA13 /
JTMS/
SWDIO
X
X
X
®
-M4 with FPU EVENTOUT signal by
RM0401 Rev 3
General-purpose I/Os (GPIO)
SWJ I/O pin assigned
PA14 /
PA15 / PB3 /
JTCK/
JTDI JTDO
SWCLK
X X X
X X X
X
Released
PB4/
NJTRST
X
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