Spi Interrupts; Table 125. Spi Interrupt Requests - ST STM32F410 Reference Manual

Advanced arm-based 32-bit mcus
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RM0401
25.5

SPI interrupts

During SPI communication an interrupts can be generated by the following events:
Transmit Tx buffer ready to be loaded
Data received in Rx buffer
Master mode fault
Overrun error
TI frame format error
Interrupts can be enabled and disabled separately.
Transmit Tx buffer ready to be loaded
Data received in Rx buffer
Master Mode fault event
Overrun error
CRC error
TI frame format error

Table 125. SPI interrupt requests

Interrupt event
RM0401 Rev 3
Serial peripheral interface/ inter-IC sound (SPI/I2S)
Event flag
TXE
RXNE
MODF
OVR
CRCERR
FRE
Enable Control bit
TXEIE
RXNEIE
ERRIE
703/771
731

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