ST STM32F410 Reference Manual page 532

Fast-mode Plus Inter-integrated circuit (FMPI2C) interface
The SDA and SCL transition time values to be used are the ones in the application. Using
the maximum values from the standard increases the constraints for the SDADEL and
SCLDEL calculation, but ensures the feature whatever the application.
Note: At every clock pulse, after SCL falling edge detection, the I2C master or slave stretches SCL
low during at least [(SDADEL+SCLDEL+1) x (PRESC+1) + 1] x t
and reception modes. In transmission mode, in case the data is not yet written in I2C_TXDR
when SDADEL counter is finished, the I2C keeps on stretching SCL low until the next data
is written. Then new data MSB is sent on SDA output, and SCLDEL counter starts,
continuing stretching SCL low to guarantee the data setup time.
If NOSTRETCH=1 in slave mode, the SCL is not stretched. Consequently the SDADEL
must be programmed in such a way to guarantee also a sufficient setup time.
Table 88. I
Symbol Parameter
t Data hold time
HD;DAT
t Data valid time
VD;DAT
t Data setup time
SU;DAT
Rise time of both SDA
t
r
and SCL signals
Fall time of both SDA
t
f
and SCL signals
Additionally, in master mode, the SCL clock high and low levels must be configured by
programming the PRESC[3:0], SCLH[7:0] and SCLL[7:0] bits in the FMPI2C_TIMINGR
register.
• When the SCL falling edge is internally detected, a delay is inserted before releasing
the SCL output. This delay is
t
I2CCLK.
t
SCLL
•
When the SCL rising edge is internally detected, a delay is inserted before forcing the
SCL output to low level. This delay is
(PRESC+1) x t
Refer to
Caution: Changing the timing configuration is not allowed when the FMPI2C is enabled.
The FMPI2C slave NOSTRETCH mode must also be configured before enabling the
peripheral. Refer to
Caution: Changing the NOSTRETCH configuration is not allowed when the FMPI2C is enabled.
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C-SMBUS specification data setup and hold times
Standard-mode
(Sm)
Min. Max
0
- 3.45
250
- 1000
- 300
impacts the SCL low time
t
I2CCLK. SCLH
FMPI2C master initialization
FMPI2C slave initialization
Fast-mode
(Fm)
Min. Max
- 0 -
- 0.9
- 100 -
- 300
- 300
t = (SCLL+1) x t
SCLL
t
LOW .
t = (SCLH+1) x t
SCLH
impacts the SCL high time
for more details.
for more details.
RM0401 Rev 3
, in both transmission
I2CCLK
Fast-mode Plus
SMBUS
(Fm+)
Min. Max Min.
0 - 0.3
- 0.45 -
50 - 250
- 120 -
- 120 -
where
t = (PRESC+1) x
PRESC PRESC
where
PRESC
t
HIGH .
RM0401
Unit
Max
-
µs
-
-
1000
ns
300
t =
PRESC