Rng Data Register (Rng_Dr) - ST STM32F410 Reference Manual

RM0401
13.8.3

RNG data register (RNG_DR)

Address offset: 0x008
Reset value: 0x0000 0000
The RNG_DR register is a read-only register that delivers a 32-bit random value when read.
After being read this register delivers a new random value after 42 periods of RNG clock if
the output FIFO is empty.
The content of this register is valid when DRDY='1', even if RNGEN='0'.
31 30 29
r r r
15 14 13
r r r
Bits 31:0 RNDATA[31:0]: Random data
32-bit random data which are valid when DRDY='1'. When DRDY='0' RNDATA value is zero.
28 27 26 25
r r r r
12 11 10 9
r r r r
True random number generator (RNG)
24 23 22
RNDATA[31:16]
r r r
8 7 6
RNDATA[15:0]
r r r
RM0401 Rev 3
21 20 19 18
r r r r
5 4 3 2
r r r r
17 16
r r
1 0
r r
267/771
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