Tpui Formatter; Table 143. Flexible Trace Pin Assignment - ST STM32F410 Reference Manual

Debug support (DBG)
DBGMCU_CR
register
TRAC TRACE
assigned for:
E_IOE _MODE
N [1:0]
No Trace
0 XX
(default state)
Asynchronou
1 00
s Trace
Synchronous
1 01
Trace 1 bit
Synchronous
1 10
Trace 2 bit
Synchronous
1 11
Trace 4 bit
1. When Serial Wire mode is used, it is released. But when JTAG is used, it is assigned to JTDO.
Note: By default, the TRACECLKIN input clock of the TPIU is tied to GND. It is assigned to HCLK
two clock cycles after the bit TRACE_IOEN has been set.
The debugger must then program the Trace Mode by writing the PROTOCOL[1:0] bits in the
SPP_R (Selected Pin Protocol) register of the TPIU.
•
PROTOCOL=00: Trace Port Mode (synchronous)
•
PROTOCOL=01 or 10: Serial Wire (Manchester or NRZ) Mode (asynchronous mode).
Default state is 01
It then also configures the TRACE port size by writing the bits [3:0] in the CPSPS_R
(Current Sync Port Size Register) of the TPIU:
•
0x1 for 1 pin (default state)
•
0x2 for 2 pins
•
0x8 for 4 pins
26.17.3

TPUI formatter

The formatter protocol outputs data in 16-byte frames:
•
seven bytes of data
• eight bytes of mixed-use bytes consisting of:
–
–
•
one byte of auxiliary bits where each bit corresponds to one of the eight mixed-use
bytes:
–
–
758/771

Table 143. Flexible TRACE pin assignment

Pins
PB3 /JTDO/
TRACESW
O
(1)
Released
TRACESW
O
(1)
Released
1 bit (LSB) to indicate it is a DATA byte ('0) or an ID byte ('1).
7 bits (MSB) which can be data or change of source ID trace.
if the corresponding byte was a data, this bit gives bit0 of the data.
if the corresponding byte was an ID change, this bit indicates when that ID change
takes effect.
TRACE IO pin assigned
PC6
PC10/
TRACED[0
TRACEC
]
K
- -
TRACECK TRACED[0]
TRACECK TRACED[0] TRACED[1]
TRACECK TRACED[0] TRACED[1] TRACED[2] TRACED[3]
RM0401 Rev 3
PC11/ PC12/
TRACED[1 TRACED[2
] ]
-
Released
(usable as GPIO)
- -
-
RM0401
PB11/
TRACED[3
]
-
-