ST STM32F410 Reference Manual page 195

RM0401
Offset Register name
DMA_S1M0AR
0x0034
Reset value 0
DMA_S1M1AR
0x0038
Reset value 0
DMA_S1FCR
0x003C
Reset value
DMA_S2CR
0x0040
Reset value
DMA_S2NDTR
0x0044
Reset value
DMA_S2PAR
0x0048
Reset value 0
DMA_S2M0AR
0x004C
Reset value 0
DMA_S2M1AR
0x0050
Reset value 0
DMA_S2FCR
0x0054
Reset value
DMA_S3CR
0x0058
Reset value
DMA_S3NDTR
0x005C
Reset value
DMA_S3PAR
0x0060
Reset value 0
DMA_S3M0AR
0x0064
Reset value 0
DMA_S3M1AR
0x0068
Reset value 0
Table 38. DMA register map and reset values (continued)
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
Direct memory access controller (DMA)
M0A[31:0]
0 0 0 0 0 0 0 0 0
M1A[31:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0
PA[31:0]
0 0 0 0 0 0 0 0 0
M0A[31:0]
0 0 0 0 0 0 0 0 0
M1A[31:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0
0 0
PA[31:0]
0 0 0 0 0 0 0 0 0
M0A[31:0]
0 0 0 0 0 0 0 0 0
M1A[31:0]
0 0 0 0 0 0 0 0 0
RM0401 Rev 3
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 1
0 0 0 0 0 0 0 0 0
NDT[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 1
0 0 0 0 0 0 0 0 0
NDT[15:0]
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
FS[2:0]
0 0 0 0 1
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
FS[2:0]
0 0 0 0 1
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
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