Dac Register Map; Table 53. Dac Register Map And Reset Values - ST STM32F410 Reference Manual

Advanced arm-based 32-bit mcus
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Digital-to-analog converter (DAC)
12.9.8

DAC register map

Table 53
Register
Offset
name
DAC_CR
0x00
Reset value
DAC_
SWTRIGR
0x04
Reset value
DAC_
DHR12R1
0x08
Reset value
DAC_
DHR12L1
0x0C
Reset value
DAC_
DHR8R1
0x10
Reset value
DAC_DOR1
0x2C
Reset value
DAC_SR
0x34
Reset value
Refer to
256/771
summarizes the DAC registers.

Table 53. DAC register map and reset values

Section 2.2 on page 41
0
0
for the register boundary addresses.
RM0401 Rev 3
0
0
0
0
0
0
0
0
0
DACC1DHR[11:0]
0
0
0
0
0
0
0
DACC1DHR[11:0]
0
0
0
0
0
0
0
0
0
DACC1DHR[7:0]
0
0
0
DACC1DOR[11:0]
0
0
0
0
0
0
0
0
RM0401
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0

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