Table 93. Smbus Timeout Specifications; Figure 200. Timeout Intervals For T - ST STM32F410 Reference Manual

Fast-mode Plus Inter-integrated circuit (FMPI2C) interface
Timeouts
This peripheral embeds hardware timers in order to be compliant with the 3 timeouts defined
in SMBus specification.
Symbol
t
TIMEOUT
t
LOW:SEXT
t
LOW:MEXT
1. t
LOW:SEXT
from the initial START to the STOP. It is possible that, another slave device or the master also extends the
clock causing the combined clock low extend time to be greater than t
measured with the slave device as the sole target of a full-speed master.
2. t
LOW:MEXT
message as defined from START-to-ACK, ACK-to-ACK, or ACK-to-STOP. It is possible that a slave device
or another master also extends the clock causing the combined clock low time to be greater than t
on a given byte. Therefore, this parameter is measured with a full speed slave device as the sole target of
the master.
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Table 93. SMBus timeout specifications

Detect clock low timeout
(1)
Cumulative clock low extend time (slave device)
(2)
Cumulative clock low extend time (master device)
is the cumulative time a given slave device is allowed to extend the clock cycles in one message
is the cumulative time a master device is allowed to extend its clock cycles within each byte of a

Figure 200. Timeout intervals for t

Parameter
LOW:SEXT
RM0401 Rev 3
Limits
Min Max
25 35
- 25
- 10
. Therefore, this parameter is
LOW:SEXT
, t .
LOW:MEXT
RM0401
Unit
ms
ms
ms
LOW:MEXT