How To Program The Watchdog Timeout; Figure 174. Window Watchdog Timing Diagram - ST STM32F410 Reference Manual

RM0401
In some applications, the EWI interrupt can be used to manage a software system check
and/or system recovery/graceful degradation, without generating a WWDG reset. In this
case, the corresponding interrupt service routine (ISR) should reload the WWDG counter to
avoid the WWDG reset, then trigger the required actions.
The EWI interrupt is cleared by writing '0' to the EWIF bit in the WWDG_SR register.
Note: When the EWI interrupt cannot be served, e.g. due to a system lock in a higher priority task,
the WWDG reset will eventually be generated.
19.4

How to program the watchdog timeout

The formula in
Warning:
The formula to calculate the timeout value is given by:
where:
t
WWDG
t
PCLK1
4096: value corresponding to internal divider.
Figure 174 must be used to calculate the WWDG timeout.
When writing to the WWDG_CR register, always write 1 in the
T6 bit to avoid generating an immediate reset.

Figure 174. Window watchdog timing diagram

t WWDG t PCLK1
=
: WWDG timeout
: APB1 clock period measured in ms
RM0401 Rev 3
WDGTB[1:0]
× ×
4096 2
Window watchdog (WWDG)
× ( ) (
T5:0] 1 ms
+
)
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