Syscfg External Interrupt Configuration Register 3; (Syscfg_Exticr3); (Syscfg_Exticr4) - ST STM32F410 Reference Manual

Advanced arm-based 32-bit mcus
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System configuration controller (SYSCFG)
7.2.5

SYSCFG external interrupt configuration register 3

(SYSCFG_EXTICR3)

Address offset: 0x10
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
Res.
15
14
13
EXTI11[3:0]
rw
rw
rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 EXTIx[3:0]: EXTI x configuration (x = 8 to 11)
7.2.6
SYSCFG external interrupt configuration register 4

(SYSCFG_EXTICR4)

Address offset: 0x14
Reset value: 0x0000 0000
31
30
29
Res.
Res.
Res.
Res.
15
14
13
EXTI15[3:0]
rw
rw
rw
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 EXTIx[3:0]: EXTI x configuration (x = 12 to 15)
158/771
28
27
26
25
Res.
Res.
Res.
12
11
10
9
EXTI10[3:0]
rw
rw
rw
rw
These bits are written by software to select the source input for the EXTIx external
interrupt.
0000: PA[x] pin
0001: PB[x] pin
0010: PC[x] pin
0101: Reserved
0110: Reserved
0111: PH[x] pin
Other configurations: reserved
28
27
26
25
Res.
Res.
Res.
12
11
10
9
EXTI14[3:0]
rw
rw
rw
rw
These bits are written by software to select the source input for the EXTIx external
interrupt.
0000: PA[x] pin
0001: PB[x] pin
0010: PC[x] pin
0101: Reserved
0110: Reserved
0111: PH[x] pin
24
23
22
Res.
Res.
Res.
8
7
6
EXTI9[3:0]
rw
rw
rw
24
23
22
Res.
Res.
Res.
8
7
6
EXTI13[3:0]
rw
rw
rw
RM0401 Rev 3
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
EXTI8[3:0]
rw
rw
rw
rw
21
20
19
18
Res.
Res.
Res.
Res.
5
4
3
2
EXTI12[3:0]
rw
rw
rw
rw
RM0401
17
16
Res.
Res.
1
0
rw
rw
17
16
Res.
Res.
1
0
rw
rw

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