Summary Of The Possible Dma Configurations; Table 36. Possible Dma Configurations - ST STM32F410 Reference Manual

Direct memory access controller (DMA)
triggered in the case of a peripheral-to-memory DMA transfer. The TCIFx flag of the
corresponding stream is set in the status register to indicate the DMA completion. To
know the number of data items transferred during the DMA transfer, read the
DMA_SxNDTR register and apply the following formula:
–
•
Normal stream interruption due to the reception of a last data hardware signal: the
stream is automatically interrupted when the peripheral requests the last transfer
(single or burst) and when this transfer is complete. the TCIFx flag of the corresponding
stream is set in the status register to indicate the DMA transfer completion. To know the
number of data items transferred, read the DMA_SxNDTR register and apply the same
formula as above.
•
The DMA_SxNDTR register reaches 0: the TCIFx flag of the corresponding stream is
set in the status register to indicate the forced DMA transfer completion. The stream is
automatically switched off even though the last data hardware signal (single or burst)
has not been yet asserted. The already transferred data is not lost. This means that a
maximum of 65535 data items can be managed by the DMA in a single transaction,
even in peripheral flow control mode.
Note: When configured in memory-to-memory mode, the DMA is always the flow controller and
the PFCTRL bit is forced to 0 by hardware.
The circular mode is forbidden in the peripheral flow controller mode.
8.3.17

Summary of the possible DMA configurations

Table 36
configurations are highlighted in gray in the table.
DMA transfer
Source
mode
Peripheral-to- AHB
memory peripheral port
Memory-to- AHB
peripheral memory port
Memory-to- AHB
memory peripheral port
180/771
Number_of_data_transferred = 0xFFFF – DMA_SxNDTR
summarizes the different possible DMA configurations. The forbidden

Table 36. Possible DMA configurations

Destination
AHB
memory port
AHB
peripheral port
AHB
memory port
Flow Circular
controller mode
DMA Possible
Peripheral Forbidden
DMA Possible
Peripheral Forbidden
DMA only Forbidden
RM0401 Rev 3
Transfer Direct
type mode
single Possible
burst Forbidden
single Possible
burst Forbidden
single Possible
burst Forbidden
single Possible
burst Forbidden
single
Forbidden Forbidden
burst
RM0401
Double-
buffer mode
Possible
Forbidden
Possible
Forbidden