11.12.17 Adc Register Map; Table 48. Adc Global Register Map; Table 49. Adc Register Map And Reset Values - ST STM32F410 Reference Manual

RM0401

11.12.17 ADC register map

The following table summarizes the ADC registers.
Offset
0x000 - 0x04C
0x050 - 0x2FC
0x300 - 0x308
Offset Register
ADC_SR
0x00
Reset value
ADC_CR1
0x04
Reset value
ADC_CR2
0x08
Reset value
ADC_SMPR1
0x0C
Reset value 0
ADC_SMPR2
0x10
Reset value 0
ADC_JOFR1
0x14
Reset value
ADC_JOFR2
0x18
Reset value
ADC_JOFR3
0x1C
Reset value
ADC_JOFR4
0x20
Reset value
ADC_HTR
0x24
Reset value
ADC_LTR
0x28
Reset value
ADC_SQR1
0x2C
Reset value
ADC_SQR2
0x30
Reset value

Table 48. ADC global register map

Table 49. ADC register map and reset values

0 0 0 0 0
EXTSEL [3:0]
0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
L[3:0]
0 0
0 0 0 0 0 0 0 0
Register
ADC1
Reserved
Common registers
DISC
NUM [2:0]
0 0
JEXTSEL
[3:0]
0 0 0 0 0 0
Sample time bits SMPx_x
0 0 0 0 0 0 0 0
Sample time bits SMPx_x
0 0 0 0 0 0 0 0
Regular channel sequence SQx_x bits
0 0 0 0 0 0 0 0
Regular channel sequence SQx_x bits
0 0 0 0 0 0 0 0
RM0401 Rev 3
Analog-to-digital converter (ADC)
0
0 0 0 0 0 0 0 0 0
0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
JOFFSET1[11:0]
0 0 0 0 0 0 0
JOFFSET2[11:0]
0 0 0 0 0 0 0
JOFFSET3[11:0]
0 0 0 0 0 0 0
JOFFSET4[11:0]
0 0 0 0 0 0 0
HT[11:0]
1 1 1 1 1 1 1
LT[11:0]
0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0
0 0 0 0 0
AWDCH[4:0]
0 0 0 0 0
0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
1 1 1 1 1
0 0 0 0 0
0 0 0 0 0
0 0 0 0 0
241/771
242