ST STM32F410 Reference Manual page 126

Reset and clock control (RCC)
Bit 8 ADC1LPEN: ADC1 clock enable during Sleep mode
Bits 7:6 Reserved, must be kept at reset value.
Bit 5 USART6LPEN: USART6 clock enable during Sleep mode
Bit 4 USART1LPEN: USART1 clock enable during Sleep mode
Bits 3:1 Reserved, must be kept at reset value.
Bit 0 TIM1LPEN: TIM1 clock enable during Sleep mode
126/771
Set and cleared by software.
0: ADC1 clock disabled during Sleep mode
1: ADC1 clock disabled during Sleep mode
Set and cleared by software.
0: USART6 clock disabled during Sleep mode
1: USART6 clock enabled during Sleep mode
Set and cleared by software.
0: USART1 clock disabled during Sleep mode
1: USART1 clock enabled during Sleep mode
Set and cleared by software.
0: TIM1 clock disabled during Sleep mode
1: TIM1 clock enabled during Sleep mode
RM0401 Rev 3
RM0401