Figure 4. Sequential 32-Bit Instruction Execution - ST STM32F410 Reference Manual

Advanced arm-based 32-bit mcus
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RM0401
Embedded Flash memory interface

Figure 4. Sequential 32-bit instruction execution

When the code is not sequential (branch), the instruction may not be present in the currently
used instruction line or in the prefetched instruction line. In this case (miss), the penalty in
terms of number of cycles is at least equal to the number of wait states.
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