Operation - Motorola MC68302 User Manual

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TIMERS
SCP
2
SMCs
OMA
PB8-PB11
SCC1 EVENT
REGISTER
SCC1 MASK
REGISTER
SCC2 EVENT
REGISTER
SCC2MASK
REGISTER
SCC3 EVENT
REGISTER
SCC3 MASK
REGISTER
a:
~
a:
w
t!i
<!)
w
a:
<!)
z
Ci
z
w
0..
,_
~
a:
a:
w
,_
;!';
a:
~
a:
I*
a
w
a:
~
::E
,_
0..
:::i
~
w
~
M68000CORE
DATA BUS
a:
g_
a:
~
<!)
w
a:
~
~
w
"'
;;!;
,_
0..
:::i
a:
a:
w
~
IRQ7/ IRQ6/ IRQ1/
IPLO IPL1 IPL2
INTERRUPT
PRIORITY
RESOLVER
IPL2-IPLO TO
M68000CORE
VECTOR
GENERATION
LOGIC
Figure 3-2. Interrupt Controller Block Diagram
IACK1
IACK6
IACK7
3.2.1 Operation
3-18
The interrupt controller receives interrupts from internal sources such as the
timers, the IDMA controller, the serial communication controllers, and the
parallel 1/0 pins (port B pins 11-8). These interrupts are called internal re-
quests (INRO). The interrupt controller allows for masking each INRQ inter-
rupt source. When multiple events within a peripheral can cause the INRQ
interrupt, each event is also maskable.
In addition to the INRQ interrupts, the interrupt controller can also receive
external requests (EXRO). EXRQ interrupts are input to the IMP according to
the operational mode selected by the user. In the normal mode, EXRO in-
MC68302 USER'S MANUAL
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