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3.3.1.5 Input Buffer Count (IBCNT) and Output Buffer Count
(OBCNT) Registers
IBCNT indicates the number of 32-bit words to be used for an operation. For example, if
the PKEU is to operate on 512 bits (16 words), IBCNT should be set to 0x0000_0010,
corresponding to sixteen, 32-bit words to be taken from the input buffer and written to the
PKEU.
When the input buffer counter reaches its terminus, IBCNT = 0, indicating that the number
of words transferred to the active execution units matches the IBCNT value, data transfer
stops automatically.
OBCNT contains the number of 32-bit words expected to be read for a particular operation.
For example, if the DEU module is to operate on 512 bits, OBCNT should be set to
0x0000_0010, corresponding to sixteen 32-bit words to be read from the DEU module and
written to the output buffer.
The output buffer asserts DREQx until OBCNT = 0, which indicates that the total number
of processed 32-bit words has been read from the output buffer.
Figure 3-6 shows the IBCNT and OBCNT registers.
0
Field
Reset
R/W
Addr
Figure 3-6. Input Buffer Count (IBCNT) and Output Buffer Count (OBCNT)
3.4 EBI Controller Operation
The controller (EBI) is the interface between the host, the input and output FIFOs, and the
individual execution units. It also contains control logic designed to help off load flow
control from the host. The controller facilitates single access or burst reads and writes from
the host, and it also manages the interrupts that execution units send to the host. The
controller also controls DREQ1 and DREQ2, which can be used to signal DMA transfers
to and from the buffers.
The MPC180E EBI supports the MPC860 or MPC8260 processor interface, depending on
the static state of the external pin CONFIG. When CONFIG is 0, the MPC180E interface
is
MPC860-compatible. When
MPC8260-compatible. Burst access is only supported to/from the input and output FIFOs.
In MPC860 mode, MPC180E always assumes bursts to be four 32-bit words. In MPC8260
mode, MPC180E always assumes bursts to be eight 32-bit words.
Chapter 3. External Bus Interface and Memory Map
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Count
0000_0000_0000_0000_0000_0000_0000_0000
R/W
IBCNT: 0x904; OBCNT: 0x906
Registers
CONFIG
is
EBI Controller Operation
1,
the
MPC180E
31
interface
is
3-11
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