Hitachi SH7750 series Hardware Manual page 736

Table 22.2 Pin Functions (cont)
Pin
No. Pin Name
88 VSSQ
&66
89
&65
90
91 VDD
92 VSS
5$6
93
5'/&$66/
94
)5$0(
95 RD/:5
:(5/&$65/
96
DQM2/
,&,25'
:(6/&$66/
97
DQM3/
,&,2:5
:(9/&$69/
98
DQM6
99 VDDQ
100 VSSQ
:(:/&$6:/
101
DQM7/5(*
102 D23
103 D24
104 D22
105 RXD
'5(43
106
'5(44
107
108 D25
109 D21
110 D26
111 D20
112 D27
113 VDDQ
Rev. 4.0, 04/00, page 728 of 850
I/O Function
Power IO GND (0 V)
O Chip select 3
O Chip select 2
Power Internal VDD
(1.8 V)
Power Internal GND
(0 V)
5$6
O
O Read/&$6/
)5$0(
O Read/write
O D23–D16 select
signal
O D31–D24 select
signal
O D55–D48 select
signal
Power IO VDD (3.3 V)
Power IO GND (0 V)
O D63–D56 select
signal
I/O Data
I/O Data
I/O Data
I SCI Data input
I Request from
DMAC0
I Request from
DMAC1
I/O Data
I/O Data
I/O Data
I/O Data
I/O Data
Power IO VDD (3.3 V)
SRAM DRAM
Reset
&66
(&66)
&65
(&65)
5$6
2(
RD/:5 RD/:5
:(5 &$65
:(6 &$66
:(9 &$69
:(: &$6:
Memory Interface
SDRAM PCMCIA MPX
&66
&65
5$6
&$6 2(
,&,25'
DQM2
,&,2:5
DQM3
DQM6
5(*
DQM7
&66
&65
)5$0(
RD/:5
A23
A24
A22
A25
A21
A20