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The WDT has the following features
• Can be used to secure clock stabilization time
Used when exiting standby mode or a temporary standby state when the clock frequency is
changed.
• Can be switched between watchdog timer mode and interval timer mode
• Internal reset generation in watchdog timer mode
An internal reset is executed on counter overflow.
Power-on reset or manual reset can be selected.
• Interrupt generation in interval timer mode
An interval timer interrupt is generated on counter overflow.
• Selection of eight counter input clocks
Any of eight clocks can be selected, scaled from the ×1 clock of frequency divider 2 shown in
figure 10.1.
The CPG is described in sections 10.2 to 10.6, and the WDT in sections 10.7 to 10.9.
Rev. 4.0, 04/00, page 198 of 850
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