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21.3
Operation
21.3.1
TAP Control
Figure 21.2 shows the internal states of the TAP control circuit. These conform to the state
transitions specified by JTAG.
• The transition condition is the TMS value at the rising edge of TCK.
• The TDI value is sampled at the rising edge of TCK, and shifted at the falling edge.
• The TDO value changes at the falling edge of TCK. When not in the Shift-DR or Shift-IR
state, TDO is in the high-impedance state.
• In a transition to 7567 = 0, a transition is made to the Test-Logic-Reset state asynchronously
with respect to TCK.
1
Test-Logic-Reset
0
0
Run-Test/Idle
1
Select-DR-Scan
1
Capture-DR
Exit1-DR
Pause-DR
0
Exit2-DR
Update-DR
1
Figure 21.2 TAP Control State Transition Diagram
1
0
0
0
Shift-DR
1
1
0
0
1
1
0
Select-IR-Scan
0
1
Capture-IR
0
Shift-IR
1
Exit1-IR
0
Pause-IR
1
0
Exit2-IR
1
Update-IR
0
1
Rev. 4.0, 04/00, page 709 of 850
1
0
1
0
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