Hitachi SH7750 series Hardware Manual page 532

Superh risc engine

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Table of Contents

Mode setting

SPTRW: Write to SPTR

SPTRR: Read SPTR

Note: * Signals that set the SCK pin function as internal clock output or external clock input according to

the CKE0 and CKE1 bits in SCSCR1 and the C/ bit in SCSMR1.

Figure 15.2 MD0/SCK Pin

Internal data bus

Clock output enable signal

Serial clock output signal

Serial clock input signal

Clock input enable signal

Rev. 4.0, 04/00, page 521 of 850

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