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CKIO
A28–A0
CSn
D63–D0
DACK
WE
CKIO
A28–A0
CSn
D63–D0
RD
DACK
Figure 14.6 DMA Transfer Timing in Single Address Mode
Dual Address Mode: Dual address mode is used to access both the transfer source and the
transfer destination by address. The transfer source and destination can be accessed by either on-
chip peripheral module or external address.
In dual address mode, data is read from the transfer source in the data read cycle, and written to
the transfer destination in the data write cycle, so that the transfer is executed in two bus cycles.
The transfer data is temporarily stored in the data buffer in the bus state controller (BSC).
In a transfer between external memories such as that shown in figure 14.7, data is read from
external memory into the BSC's data buffer in the read cycle, then written to the other external
(a) From external device with DACK to external memory space
(b) From external memory space to external device with DACK
Address output to external memory
space
Data output from external device
with DACK
DACK signal to external
device with DACK
WE signal to external memory space
Address output to external memory
space
Data output from external memory
space
RD signal to external memory space
DACK signal to external
device with DACK
Rev. 4.0, 04/00, page 449 of 850
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