Hitachi SH7750 series Hardware Manual page 61

Superh risc engine
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VA is
in P4 area
Access prohibited
No
Search UTLB
Match?
No
Instruction TLB
miss exception
Instruction TLB protection
violation exception
Rev. 4.0, 04/00, page 44 of 850
Instruction access to virtual address (VA)
VA is
in P2 area
0
CCR.ICE?
VPNs match
and V = 1
Yes
Hardware ITLB
miss handling
Yes
Record in ITLB
0
Figure 3.11 Flowchart of Memory Access Using ITLB
VA is
in P1 area
No
1
No
and (MMUCR.SV = 0 or
No
and ASIDs match and
0 (User)
PR?
1
C = 1
and CCR.ICE = 1
Yes
Cache access
VA is in P0, U0,
or P3 area
MMUCR.AT = 1
Yes
SH = 0
SR.MD = 0)
Yes
VPNs match
V = 1
Yes
Only one
entry matches
Yes
SR.MD?
1 (Privileged)
Instruction TLB
multiple hit exception
No
Memory access
(Non-cacheable)
No

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