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20.2.3
Break ASID Register A (BASRA)
Bit:
Initial value:
R/W:
Note: *: Undefined
Break ASID register A (BASRA) is an 8-bit readable/writable register that specifies the ASID
used in the channel A break conditions. BASRA is not initialized by a power-on reset or manual
reset.
Bits 7 to 0—Break ASID A7 to A0 (BASA7–BASA0): These bits hold the ASID (bits 7–0) used
in the channel A break conditions.
20.2.4
Break Address Mask Register A (BAMRA)
Bit:
Initial value:
R/W:
Note: *: Undefined
Break address mask register A (BAMRA) is an 8-bit readable/writable register that specifies
which bits are to be masked in the break ASID set in BASRA and the break address set in BARA.
BAMRA is not initialized by a power-on reset or manual reset.
Bits 7 to 4—Reserved: These bits are always read as 0, and should only be written with 0.
Bit 2—Break ASID Mask A (BASMA): Specifies whether all bits of the channel A break ASID
(BASA7–BASA0) are to be masked.
Bit 2: BASMA
0
1
Rev. 4.0, 04/00, page 682 of 850
7
6
BASA7
BASA6
*
*
R/W
R/W
7
6
—
—
0
0
R
R
Description
All BASRA bits are included in break conditions
No BASRA bits are included in break conditions
5
4
BASA5
BASA4
*
*
R/W
R/W
5
4
—
—
BAMA2 BASMA BAMA1 BAMA0
0
0
R
R
3
2
BASA3
BASA2
*
*
R/W
R/W
3
2
*
*
R/W
R/W
1
0
BASA1
BASA0
*
*
R/W
R/W
1
0
*
*
R/W
R/W
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