Hitachi SH7750 series Hardware Manual page 372

Superh risc engine
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CKIO
Bank
Precharge-sel
Address
RD/
DQMn
D63–D0
(read)
CKE
DACKn
(SA: IO ← memory)
Figure 13.31 Burst Read Timing (RAS Down, Same Row Address)
Tc1
Tc2
Tc3 Tc4/Td1
H/L
c1
Td2
Td3
Td4
c1
c2
c3
Rev. 4.0, 04/00, page 361 of 850
c4

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