Hitachi SH7750 series Hardware Manual page 493

Superh risc engine
Hide thumbs Also See for SH7750 series:
Table of Contents

Advertisement

CLK
DBREQ
BAVL
TR
A25–A0
D63–D0
RAS,
CAS, WE
TDACK
ID1, ID0
Figure 14.28 Single Address Mode/Burst Mode/External Bus → → → → External Device 32-Byte
CLK
DBREQ
BAVL
TR
A25–A0
D63–D0
RAS,
CAS, WE
TDACK
ID1, ID0
Figure 14.29 Single Address Mode/Burst Mode/External Device → → → → External Bus 32-Byte
Rev. 4.0, 04/00, page 482 of 850
DTR
Block Transfer/Channel 0 On-Demand Data Transfer
DTR
Block Transfer/Channel 0 On-Demand Data Transfer
RA
CA
BA
RD
RA
CA
D0
D1
BA
WT
D0
D1
D2
D3
00
D2
D3

Advertisement

Table of Contents
loading

This manual is also suitable for:

Sh7750sSh7750

Table of Contents