Appendix E Pin Functions; Pin States - Hitachi SH7750 series Hardware Manual

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E.1

Pin States

Table E.1
Pin States in Reset, Power-Down State, and Bus-Released State
Signal Name
D0–D7
D8–D15
D16–D23
D24–D31
D32–D39
D40–D47
D48–D55
D56–D63
A0, A1, A18–A25
A2–A17
5(6(7
%$&./%65(4
%5(4/%6$&.
%6
CKE
&69–&63
5$6
5'/&$66
RD/:5
5'<
Rev. 4.0, 04/00, page 826 of 850

Appendix E Pin Functions

Reset
(Power-On)
I/O
Master Slave
15
15
I/O
Z*
Z*
15
15
I/O
Z*
Z*
15
15
I/O
Z*
Z*
15
15
I/O
Z*
Z*
15
15
I/O
Z*
Z*
15
15
I/O
Z*
Z*
15
15
I/O
Z*
Z*
15
15
I/O
Z*
Z*
16
16
O
Z*
Z*
16
16
O
Z*
Z*
I
I
I
O
H
H
16
16
I
I*
I*
16
O
H
Z*
O
H
H
16
O
H
Z*
16
O
H
Z*
16
O
H
Z*
16
O
H
Z*
16
16
I
I*
I*
Reset
(Manual)
Master Slave Sleep Standby
15
15
15
Z*
Z*
Z*
15
15
15
Z*
Z*
Z*
15
15
15
Z*
Z*
Z*
15
15
15
Z*
Z*
Z*
15
15
15
ZK *
ZK *
Z*
15
15
15
ZK*
ZK*
Z*
15
15
15
Z*
Z*
Z*
15
15
15
Z*
Z*
Z*
14
14
Z*
Z*
O
14
9
14
Z*
O*
Z*
O
I
I
I
H
H
O
13
13
13
I*
I*
I*
14
4
H
Z*
O*
6
6
6
O*
O*
O*
14
4
H
Z*
O*
6
14
4
O*
Z*
O*
6
14
4
O*
Z
O*
14
4
H
Z*
O*
13
13
13
I*
I*
I*
Bus
Released Notes
15
15
Z*
Z*
15
15
Z*
Z*
15
15
Z*
Z*
15
15
Z*
Z*
15
15
K
Z*
K
Z*
K
15
15
K
Z*
K
Z*
K
15
15
Z*
Z*
15
15
Z*
Z*
14
7
14
Z*
O*
Z*
14
7
14
Z*
O*
Z*
I
I
H
O
13
13
I*
I*
14
7
14
Z*
H*
Z*
6
L
O*
14
7
14
Z*
H*
Z*
14
5
14
Z*
O*
Z*
O*
5
5
ZO*
ZO*
14
7
14
Z*
H*
Z*
13
13
I*
I*
Output
state held
when
used as
port
Output
state held
when
used as
port
5

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