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Table 16.5 Serial Transfer Formats
SCSMR2
Settings
CHR PE
STOP
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
S:
Start bit
STOP: Stop bit
P:
Parity bit
Clock
Either an internal clock generated by the on-chip baud rate generator or an external clock input at
the SCK2 pin can be selected as the SCIF's serial clock, according to the setting of the CKE1 bit
in SCSCR2. For details of SCIF clock source selection, see table 16.4.
When an external clock is input at the SCK2 pin, the clock frequency should be 16 times the bit
rate used.
Rev. 4.0, 04/00, page 596 of 850
Serial Transfer Format and Frame Length
1
2
3
4
S
S
S
S
S
S
S
S
5
6
7
8-bit data
8-bit data
8-bit data
8-bit data
7-bit data
7-bit data
7-bit data
7-bit data
8
9
10
11
STOP
STOP STOP
P
STOP
P
STOP STOP
STOP
STOP STOP
P
STOP
P
STOP STOP
12
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