Serial Mode Register (Scsmr1) - Hitachi SH7750 series Hardware Manual

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Bit 0—Smart Card Interface Mode Select (SMIF): Enables or disables the smart card interface
function.
Bit 0: SMIF
0
1
17.2.2

Serial Mode Register (SCSMR1)

Bit 7 of SCSMR1 has a different function in smart card interface mode.
Bit:
Initial value:
R/W:
Bit 7—GSM Mode (GM): Sets the smart card interface function to GSM mode.
With the normal smart card interface, this bit is cleared to 0. Setting this bit to 1 selects GSM
mode, an additional mode for controlling the timing for setting the TEND flag that indicates
completion of transmission, and the type of clock output used. The details of the additional clock
output control mode are specified by the CKE1 and CKE0 bits in the serial control register
(SCSCR1). In GSM mode, the pulse width is guaranteed when SCK start/stop specifications are
made by CKE1 and CKE0.
Bit 7: GM
0
1
Note: etu: Elementary time unit (time for transfer of 1 bit)
Bits 6 to 0: Operate in the same way as for the normal SCI. See section 15, Serial Communication
Interface, for details. With the smart card interface, the following settings should be used: CHR =
0, PE = 1, STOP = 1, MP = 0.
Description
Smart card interface function is disabled
Smart card interface function is enabled
7
6
GM(C/$)
CHR
0
0
R/W
R/W
Description
Normal smart card interface mode operation
The TEND flag is set 12.5 etu after the beginning of the start bit
Clock output on/off control only
GSM mode smart card interface mode operation
The TEND flag is set 11.0 etu after the beginning of the start bit
Clock output on/off and fixed-high/fixed-low control (set in SCSCR1)
5
4
PE
O/(
STOP
0
0
R/W
R/W
3
2
MP
CKS1
0
0
R/W
R/W
Rev. 4.0, 04/00, page 615 of 850
(Initial value)
1
0
CKS0
0
0
R/W
R/W
(Initial value)

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