Table of Contents
Advertisement
Bit 7—Standby (STBY): Specifies a transition to standby mode.
Bit 7: STBY
0
1
Bit 6—Peripheral Module Pin High Impedance Control (PHZ): Controls the state of
peripheral module related pins in standby mode. When the PHZ bit is set to 1, peripheral module
related pins go to the high-impedance state in standby mode.
For the relevant pins, see section 9.2.2, Peripheral Module Pin High Impedance Control.
Bit 6: PHZ
0
1
Bit 5—Peripheral Module Pin Pull-Up Control (PPU): Controls the state of peripheral module
related pins. When the PPU bit is cleared to 0, the pull-up resistor is turned on for peripheral
module related pins in the input or high-impedance state.
For the relevant pins, see section 9.2.3, Peripheral Module Pin Pull-Up Control.
Bit 5: PPU
0
1
Bit 4—Module Stop 4 (MSTP4): Specifies stopping of the clock supply to the DMAC among the
on-chip peripheral modules. The clock supply to the DMAC is stopped when the MSTP4 bit is set
to 1. When DMA transfer is used, stop the transfer before setting the MSTP4 bit to 1. When DMA
transfer is performed after clearing the MSTP4 bit to 0, DMAC settings must be made again.
Bit 4: MSTP4
0
1
Rev. 4.0, 04/00, page 180 of 850
Description
Transition to sleep mode on execution of SLEEP instruction
Transition to standby mode on execution of SLEEP instruction
Description
Peripheral module related pins are in normal state
Peripheral module related pins go to high-impedance state
Description
Peripheral module related pin pull-up resistors are on
Peripheral module related pin pull-up resistors are off
Description
DMAC operates
DMAC clock supply is stopped
(Initial value)
(Initial value)
(Initial value)
(Initial value)
Advertisement
Table of Contents
