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22.2
Pin Functions
22.2.1
Pin Functions (256-Pin BGA)
Table 22.1 Pin Functions
Pin
No.
No.
Pin Name
5'<
1
B2
5(6(7
2
B1
&63
3
C2
&64
4
C1
&67
5
D4
&68
6
D3
&69
7
D2
%6
8
D1
9
E4
VSSQ
5'5
10
E3
11
F3
VDDQ
12
F4
VSSQ
13
E2
D47
14
E1
D32
15
G3
VDD
16
G4
VSS
17
F2
D46
18
F1
D33
19
H3
VDDQ
20
H4
VSSQ
21
G2
D45
22
G1
D34
23
H2
D44
24
H1
D35
25
J3
VDDQ
26
J4
VSSQ
27
J2
D43
28
J1
D36
I/O
Function
I
Bus ready
I
Reset
O
Chip select 0
O
Chip select 1
O
Chip select 4
O
Chip select 5
O
Chip select 6
O
Bust start
Power IO GND (0 V)
= 5'/&$66/
O
)5$0(
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
Data/port
I/O
Data/port
Power Internal VDD
(1.8 V)
Power Internal GND
(0 V)
I/O
Data/port
I/O
Data/port
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
Data/port
I/O
Data/port
I/O
Data/port
I/O
Data/port
Power IO VDD (3.3 V)
Power IO GND (0 V)
I/O
Data/port
I/O
Data/port
Reset
SRAM
DRAM
5'<
&63
&64
&67
&68
&69
(%6)
(%6)
2(
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
Memory Interface
SDRAM PCMCIA MPX
5'<
5(6(7
&(4$
&(4%
(%6)
(%6)
&$6
2(
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
Rev. 4.0, 04/00, page 715 of 850
5'<
&63
&64
&67
&68
&69
(%6)
)5$0(
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
(Port)
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