Broadcom BCM5722 Programmer's Manual page 91

Programmer's Guide
10/15/07
O ASF A
THER CTIONS
Most of the ASF required actions other than those described above are to be handled by the firmware in the chips internal
RISCs. One exception to this would be detection of the incoming RMCP packets, which would be handled by programming
the appropriate rules into the MAC receive rule checker.
LED C
ONTROL
The BCM5722 Ethernet controller supports four LEDs—one for data traffic in either direction and three for 10/100/1000 Mbps
links established. The traffic LED blinks during transmit and receive data movement through the device. The blink rate is
programmable with a default of approximately 15 Hz. The link LEDs turn either on or off depending on the link established.
All LEDs can be controlled directly by software via the override bits in LED_Control register (see
(Offset 0x40C)" on page 247). When the override bit is off, the link LEDs are automatically set by the hardware as long as
link is up:
• 10 Mbps LED—port mode is set to MII and Mode 10 Mbps in MI Status register is set.
• 100 Mbps LED—port mode is set to MII and Mode 10 Mbps in MI Status register is not set.
• 1000 Mbps LED—port mode is set to GMII or TBI.
The link status information is obtained either from auto-polling the PHY if bit 4 (Port Polling) of MI Mode register (see
Mode Register (Offset 0x454)" on page
M A
EMORY RBITER
The Memory Arbiter (MA) is a gatekeeper for internal memory access. The MA is responsible for decoding the internal
memory addresses that correspond to BCM5722 Ethernet controller data structures and control maps. The MA is
responsible for accessing both internal and external SSRAM. If a functional block faults or traps during access to internal/
external memory, the MA handles the failing condition and reports the error in a status register. In addition to architectural
blocks, the MA provides a gateway for the RISC processors to access local memory. Each RISC has an MA interface that
pipelines up to three access requests. The MA negotiates local memory access, so all portions of the architecture are
provided with fair access to memory resources. The MA prevents starvation and bounds access latency. Host software may
enable/disable/reset the MA, and there are no tunable parameters.
Document 5722-PG101-R
252) is set, or from the LNKRDY input pin if this bit is not set.
Bro adco m Co rp or atio n
BCM5722
"LED Control Register
"MI
LED Control Page 32