Table 518: Spare Control 2 Register (Address 1Ch, Shadow Value 00100) - Broadcom BCM5722 Programmer's Manual

BCM5722
S C 2 (PHY_A
PARE ONTROL

Table 518: Spare Control 2 Register (Address 1Ch, Shadow Value 00100)

Bit Field
15 Write Enable
14:10 Shadow Register Selector
9:5 Reserved
4:2 Reserved
1 Energy Detect on INTR pin
0 Reserved
Write Enable
During a write to this register, setting Spare Control 2 Register bit 15 allows writing to bits [9:0] of this register. For reading
the values of bits [9:0], perform an MDIO write with bit 15 cleared and preferred shadow values in bits [14:10]. The next MDIO
read of register address 1Ch contains the preferred Shadow register values in bits [9:0].
Shadow Register Selector
Bits [14:10] must be set to 00100 to enable read/write to the Spare Control 2 register.
Energy Detect on INTR Pin
Setting bit one of this register enables the Energy Detect function on the INTR pin. Otherwise, the INTR pin defaults to
Interrupt function.
Page 457 Transceiver Registers
= 0 1, R _A
DDR X EG DDR
Description
• 1 = Write bits [9:0].
• 0 = Read bits [9:0].
00100 = Spare Control 2 register.
Write as 00h, ignore when read.
Write as 011, ignore when read.
• 1 = routes Energy Detect to interrupt signal. Use LED
selectors (reg 1Ch shadow 01101 and 01110) and
program to INTR mode.
• 0 = INTR pin is Interrupt function.
Write as 0, ignore when read.
Bro adco m C orp or atio n
Programmer's Guide
= 1C , S 00100
H HADOW
10/15/07
)
B
Init Access
0 R/W
00100 R/W
00h RO
011 RO
0 R/W
0 RO
Document 5722-PG101-R