Broadcom BCM5722 Programmer's Manual page 148

BCM5722
page 238 for the host standard and flat modes and
for the indirect mode).
63. Configure the Write DMA Mode register (see
bits are asserted:
• Enable—starts the functional block
• Write_DMA_PCI_Target_Abort_Attention_Enable
• Write_DMA_PCI_Master_Abort_Attention_Enable
• Write_DMA_PCI_Parity_Attention_Enable
• Write_DMA_PCI_Host_Address_Overflow_Attention_Enable
• Write_DMA_PCI_FIFO_Underrun_Attention_Enable
• Write_DMA_PCI_FIFO_Overrun_Attention_Enable
• Write_DMA_PCI_FIFO_Overread_Attention_Enable
• Write_DMA_Local_Memory_Read_Longer_Than_DMA_Length
64. Set bit-29 of the Write DMA Mode register (see
host coalescence block fix that configures the device to send out status block update before the interrupt message.
65. Configure the Read DMA Mode register (see
bits are asserted:
• Enable—start functional block
• Read_DMA_PCI_Target_Abort
• Read_DMA_PCI_Master_Abort
• Read_DMA_PCI_Parity_Error
• Read_DMA_PCI_Host_Overflow_Error
• Read_DMA_PCI_FIFO_Overrun_Error
• Read_DMA_PCI_FIFO_Underrun_Error
• Read_DMA_PCI_FIFO_Overread_Error
• Read_DMA_Local_Memory_Write_Longer_Than_DMA_Length
66. Enable the receive data completion functional block. Set the Enable and Attn_Enable bits in the Receive Data
Completion Mode register (see
67. Enable the send data completion functional block. Set the Enable bit in the Send Data Completion Mode register (see
"Send Data Completion Mode Register (Offset 0x1000)" on page
68. Enable the send BD completion functional block. Set the Enable and Attn_Enable bits in the Send BD Completion Mode
register (see "Send BD Completion Mode Register (Offset 0x1C00)" on page
69. Enable the Receive BD Initiator Functional Block. Set the Enable and Receive_BDs_Available_On_Receive_BD_Ring
in the Receive BD Initiator Mode register (see
70. Enable the receive data and BD initiator functional block. Set the Enable and Illegal_Return_Ring_Size bits in the
Receive Data and Receive BD Initiator Mode register (see
0x2400)" on page 286).
71. Enable the send data initiator functional block. Set the Enable bit in the Send Data Initiator Mode register (see
Data Initiator Mode Register (Offset 0x0C00)—BCM5722, BCM5755, BCM5755M, BCM5756M, BCM5757, BCM5754,
BCM5787, and BCM5906 Only" on page
72. Enable the send BD initiator functional block. Set the Enable and Attn_Enable bits in the Send BD Initiator Mode register
(see "Send BD Initiator Mode Register (Offset 0x1800)" on page
73. Enable the send BD selector functional block. Set the Enable and Attn_Enable bits in the Send BD Selector Mode
register (see "Send BD Ring Selector Mode Register (Offset 0x1400)" on page
Page 89 Initialization
"Interrupt Mailbox 0 Register (Offset 0x5800–0x5807)" on page 325
"Write DMA Mode Register (Offset 0x4C00)" on page
"Write DMA Mode Register (Offset 0x4C00)" on page
"Read DMA Mode Register (Offset 0x4800)" on page
"Receive Data Completion Mode Register (Offset 0x2800)" on page
"Receive BD Initiator Mode Register (Offset 0x2C00)" on page
"Receive Data and Receive BD Initiator Mode Register (Offset
269).
Bro adco m C orp or atio n
Programmer's Guide
276).
280).
279).
277).
10/15/07
314). The following
314) to enable the
311). The following
288).
289).
"Send
Document 5722-PG101-R