Table 190: Ethernet Mac Mode Register (Offset 0X400) - Broadcom BCM5722 Programmer's Manual

BCM5722
E MAC M
THERNET ODE
Bit Field
31:27 Reserved
26 Free Running ACPI
25 Halt Interesting Packet PME
24 Keep Frame in WOL
23 Enable FHDE
22 Enable RDE
21 Enable TDE
20 Reserved
19 ACPI Power-on Enable
18 Magic Packet Detect Enable
17 Reserved
16 Flush TX Statistics
15 Clear TX Statistics
14 Enable TX Statistics
13 Flush RX Statistics
12 Clear RX Statistics
11 Enable RX Statistics
10 Reserved
9 Max Defer
8 Enable TX Bursting
7 Tagged MAC Control
6:5 Reserved
4 Loopback Mode
3:2 Port mode
1 Half-duplex
0 Global MAC Reset
Page 245 Ethernet MAC Control Registers
R (O
EGISTER FFSET

Table 190: Ethernet MAC Mode Register (Offset 0x400)

Description
–
When this bit is set, the ACPI state machine will continue
running when a match is found. When this bit is clear, the
ACPI state machine will halt when a match is found.
When this bit is set, the WOL signal will not be asserted on an
interesting packet match.
–
Enable the receive Frame Header DMA engine. Must be set
for normal operation.
Enable the Receive DMA engine. Must be set for normal
operation.
Enable Transmit DMA engine.
–
Enable WOL filters when in power-down mode.
Enable Magic Packet Detection.
–
Write transmit statistics to external memory. This bit is self-
clearing.
Clear transmit statistics internal RAM. This bit is self-clearing. 0
Enable transmit statistics external updates.
Write receive statistics to external memory. This bit is self-
clearing.
Clear receive statistics internal RAM. This bit is self-clearing. 0
Enable receive statistics external updates.
–
Enable Max Deferral checking statistic.
Enable transmit bursting in gigabit half-duplex mode.
Allow the MAC to receive tagged MAC control packets.
–
When set, an internal loopback path is enabled from the
transmit MAC to the receive MAC. This bit is provided for
diagnostic purposes only.
These bits determine what interface the port is running:
• 11 = TBI (ten bit interface)
• 10 = GMII
• 01 = MII
• 00 = None (default)
When set, the MII/GMII interface is configured to operate in
half-duplex mode and the CSMA/CD state machines in the
MAC are set to half-duplex mode. The default value is 0.
When this bit is set to 1 the MAC state machine is reset. This
is a self-clearing bit. The default value is 0.
Bro adco m C orp or atio n
0 400)
X
Programmer's Guide
10/15/07
Init Access
0 RO
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
0 RO
0 R/W
0 R/W
0 R/W
0 R/W
R/W
0 R/W
0 R/W
R/W
0 R/W
0 RO
0 R/W
0 R/W
0 R/W
00 RO
01 R/W
0 R/W
0 R/W
Document 5722-PG101-R