Broadcom BCM5722 Programmer's Manual page 441

Programmer's Guide
10/15/07
Address
TLP Diagnostic Registers (these are Transaction Layer Protocol Hardware Debug Registers)—
BCM5906, BCM5906M only
0x7C00
0x7C04
0x7C08:0x7CFF
Data Link Layer Internal Registers
0x7D00
0x7D04
0x7D08
0x7D0C
0x7D10
0x7D14
0x7D18
0x7D1C
0x7D20
0x7D24
0x7D28
0x7D2C
0x7D30
0x7D34
0x7D38
0x7D3C
0x7D40
0x7D44
0x7D48
0x7D4C
0x7D50
0x7D54
0x7D58–0x7dff
PHY Internal Registers
0x7E00
0x7E04
0x7E08
0x7E0C
0x7E10
0x7E14
0x7E18
0x7E1C
Document 5722-PG101-R
Table 412: PCIe Registers (Cont.)
Description
TLP Control register
TLP Workaround Register
Reserved
Data Link Control register
Data Link Status register
Data Link Attention register
Data Link Attention Mask register
Next Transmit Sequence Number Debug register
Acked Transmit Sequence Number Debug register
Purged Transmit Sequence Number Debug register
Receive Sequence Number Debug register
Data Link Replay register
Data Link ACK Timeout register
Power Management Threshold register
Retry Buffer Write Pointer Debug register
Retry Buffer Read Pointer Debug register
Retry Buffer Purged Pointer Debug register
Retry Buffer Read/Write Debug Port
Error Count Threshold register
TLP Error Counter register
DLLP Error Counter
NAK Received Counter
Data Link Test register
Packet BIST register
Link PCIe 1.1 Control Register
Reserved
PHY Mode register
PHY/Link Status register
PHY/Link LTSSM Control register
PHY/Link Training Link Number
PHY/Link Training Lane Number
PHY/Link Training N_FTS
PHY Attention Register
PHY Attention Mask register
Bro adco m Co rp or atio n
BCM5722
PCIe Registers Page 382